NXP Semiconductors /MIMXRT1011 /SNVS /LPSMCMR

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Interpret as LPSMCMR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0MON_COUNTER0MC_ERA_BITS

Description

SNVS_LP Secure Monotonic Counter MSB Register

Fields

MON_COUNTER

Monotonic Counter most-significant 16 Bits The MC is incremented by one when: A write transaction to the LPSMCMR or LPSMCLR register is detected

MC_ERA_BITS

Monotonic Counter Era Bits These bits are inputs to the module and typically connect to fuses

Links

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